View MSM66573L-TB_1484218.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

pedl66573-02 1 semiconductor this version: aug. 1999 previous version: jun.1999 msm66573 family preliminary 16-bit microcontroller 1/28 general description the msm66573 family of highly functional cmos 16-bit single chip microcontrollers utilize the nx-8/500s, oki's proprietary cpu core. a wide variety of internal multi-functioned timers provide timer functions such as compare out, capture, event counter, auto reload, and pwm, and can be used for periodic and timed measurements. in addition to the main clock and clock gear functions, there is a sub clock (32.768 khz) that is suitable for low power applications. a three channel serial interface and a high-speed bus interface that has separate address and data buses and does not require external address latches are provided as interfaces to external devices. with a 16-bit cpu core that enables high-speed 16-bit arithmetic computations and a variety of bit processing functions, this general-purpose microcontroller is optimally suited for digital audio devices such as a mini-disc and an mp3 player. the flash rom version (msm66q573l) programmable with a single 2.4 v (minimum) power supply and flash rom version (msm66q573) programmable with a single 5 v power supply are also included in the family. these versions are easily adaptable to sudden specification changes and to new product versions. applications digital audio control systems pc peripheral control systems office electronics control systems ordering information order code or product name package remark MSM66573L-TB low voltage version (2.4 to 3.6 v) msm66573-tb 5v mask rom version (4.5 to 5.5 v) msm66q573l-tb msm66573l flash rom version msm66q573-tb msm66573 flash rom version msm66p573-tb 100-pin plastic tqfp (tqfp 100-p-1414-0.50-k) msm66573 otp rom version (2.7 to 5.5 v)
pedl66573-02 1 semiconductor msm66573 family 2/28 features name msm66573l msm66573 operating temperature ?30c to +70c power supply voltage/ maximum frequency v dd =2.4 to 3.6 v/f=14 mhz v dd =4.5 to 5.5 v/f=30 mhz 143 ns at 14 mhz (2.4 to 3.6 v) 67ns at 30 mhz (4.5 to 5.5 v) minimum instruction execution time 61 s at 32.768 khz (2.4 to 3.6/4.5 to 5.5 v) internal rom size (max. external) 64 kb (1 mb) internal ram size (max. external) 4 kb (1 mb) i/oports 75 i/o pins (with programmable pull-up resistors) 8 input-only pins 16-bit free running timer 1ch compare out/capture input 2ch 16-bit timer (auto reload/timer out) 1ch 8-bit auto reload timer 1ch 8-bit auto reload timer 3ch (also fumctions as serial communication baud rate generator) watchdog timer (also functions as 8-bit auto reload timer) watch timer (real-time counter) 1ch timers 8-bit pwm 4ch (can also be used as 16-bit pwm 2ch) serial port uart 1ch synchronous 1ch uart/ synchronous 1ch a/d converter 10-bit a/d converter, 8-ch multiplexer 1ch external interrupt non-maskable 1ch maskable 6ch interrrupt priority 3 levels separate address and data busses bus release function others dual clocks otp rom version msm66p573 (max. f = 24 mhz) flash rom version msm66q573l msm66q573
pedl66573-02 1 semiconductor msm66573 family 3/28 special features 1. high-performance cpu the family includes the high-performance cpu, powerful bit manipulation instruction set, full symmetrical addressing mode, and rom window function, and also provides the best optimized c compiler support. 2. a variety of power saving modes attaching a 32.768-khz crystal produces a real-time clock signal from the internal clock timer. use of a single clock in place of dual clocks is possible. switching the cpu clock to this clock signal, 1/2 main clock, or 1/4 main clock, then produces operation in a low power consumption mode. the clock gear function allows a 1/2 or 1/4 main clock to be selected for the cpu operating clock. the family provides a wide range of standby control functions. in addition to the usual stop mode that stops the oscillator, there are the quick restart stop mode that shuts down the cpu and peripherals but leaves the oscillator running, and the halt mode that shuts down the cpu but leaves the peripherals running. 3. msm66q573l and msm66q573 with flash memory programmable with single power supply in addition to the regular mask rom version, the family includes these versions with 64kb of flash memory that can be programmed using a single power supply. for the msm66q573l, an internal booster circuit derives the necessary program voltage from the device's low (2.4 v min) power supply, and the program voltage for the msm66q573 is provided with a single 5 v power supply. 4. multifunction, high-precision analog-to-digital converter the family includes a high-precision 10-bit analog-to-digital converter with eight channels and is ideal for such analog control functions as processing audio signals, processing sensor inputs, detecting key switch states, and controlling battery use in portable equipment. each channel has its own result register readily accessible from the software. in addition to single-channel conversions, there is also a scan function offering automatic conversion from the user's choice of starting channel through to the last channel. 5. multifunction pwm the family supports both 8- and 16-bit pwm operation. choosing between the time-base counter output or overflow from an 8-bit auto-reload timer as the pwm counter clock source provides a wide number of possibilities over a broad frequency range. the 16-bit pwm configuration supports a high-speed synchronization mode that generates a high-precision output signal with less ripple suitable for digital-to-analog control applications. 6. programmable pull-up resistors building the pull-up resistors into the chip contributes to overall design compactness. making them programmable on a per-bit basis allows complete flexibility in circuit board layout and system design. these programmable pull-up resistors are available for all i/o pins not already assigned specific functions (such as the oscillator connection pins). 7. high-speed bus interface the interface to external devices uses separate data and address buses. this arrangement permits rapid bus access for controlling the system from the microcontroller. 8. wide support for external interrupts there are a total of seven interrupt channels for use in communicating with external devices: six for maskable interrupts and one for non-maskable interrupts.
pedl66573-02 1 semiconductor msm66573 family 4/28 block diagram nmi exint0 to exint5 instruction decoder ram 4k tbc rtc tm0out tm0evt clkout xtout cpu core port control rom 64k bus port control rxd0 txd0 rxc0 tm3out tm3evt rxd1 txd1 rxc1 txc1 tm4out sioi3 sioo3 siock3 tm5evt 16 bit timer0 peripheral sio0 (uart) 8 bit timer3/brg sio1 (uart/sync) 8 bit time4/brg 8 bit pwm0 8 bit pwm1 sio3 (sync) 8 bit timer5/brg 8 bit timer6/wd t 8 bit timer9 cap/cmp 16 bit frc 10 bit a/d converter interrupt pwmout0 pwmout2 pwmout1 pwmout3 tm9out tm9evt cpcm0 cpcm1 v ref agnd ai0 to ai7 alu control acc p0 p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 system control ea psen rd wr wait d0 to d7 a0 to a19 memory control pointing registers local registers ssp lrb psw pc dsr tsr csr xt0 xt1 osc0 osc1 hold hldack res control registers alu
pedl66573-02 1 semiconductor msm66573 family 5/28 pin configuration (top view) p10-4 p10-5 tm5evt/p10-7 rxd1/p8-0 txd1/p8-1 rxc1/p8-2 txc1/p8-3 tm4out/p8-4 pwm2out/p8-6 pwm3out/p8-7 pwm0out/p7-6 pwm1out/p7-7 v dd gnd hldack/p9-7 exint4/p9-0 exint5/p9-1 p9-2 p9-3 exint0/p6-0 exint1/p6-1 exint2/p6-2 exint3/p6-3 p6-4 p6-5 p1-6/a14 p1-5/a13 p1-4/a12 p1-3/a11 p1-2/a10 p1-1/a9 p1-0/a8 p4-7/a7 p4-6/a6 p4-5/a5 p4-4/a4 p4-3/a3 p4-2/a2 p4-1/a1 p4-0/a0 gnd p0-7/d7 p0-6/d6 p0-5/d5 p0-4/d4 p0-3/d3 p0-2/d2 p0-1/d1 p0-0/d0 p3-3/wr p3-2/rd p3-1/psen p11-7/tm9evt p11-6/tm9out p11-3/xtout p11-2/clkout p11-1/hold p11-0/wait v dd osc1 osc0 gnd xt1 xt0 v dd ea nmi res p5-7/tm0evt p5-6/tm0out p5-5/cpcm1 p5-4/cpcm0 p6-7 p6-6 a16/p2-0 a17/p2-1 a18/p2-2 a19/p2-3 v dd v ref ai0/p12-0 ai1/p12-1 ai2/p12-2 ai3/p12-3 ai4/p12-4 ai5/p12-5 ai6/p12-6 ai7/p12-7 agnd rxd0/p7-0 txd0/p7-1 gnd rxc0/p7-2 tm3out/p7-4 tm3evt/p7-5 siock3/p10-0 sioi3/p10-1 sioo3/p10-2 p10-3 80 85 90 95 100 1 5 10 15 20 25 75 70 65 60 55 50 45 40 35 30 p1-7/a15 100-pin plastic tqfp
pedl66573-02 1 semiconductor msm66573 family 6/28 pin configuration (top view) (continued) p10-4 p10-5 tm5evt/p10-7 rxd1/p8-0 txd1/p8-1 rxc1/p8-2 txc1/p8-3 tm4out/p8-4 pwm2out/p8-6 pwm3out/p8-7 pwm0out/p7-6 pwm1out/p7-7 v dd gnd hldack/p9-7 exint4/p9-0 exint5/p9-1 p9-2 p9-3 exint0/p6-0 exint1/p6-1 exint2/p6-2 exint3/p6-3 p6-6 p6-4 p6-5 p1-6/a14 p1-5/a13 p1-4/a12 p1-3/a11 p1-2/a10 p1-1/a9 p1-0/a8 p4-7/a7 p4-6/a6 p4-5/a5 p4-4/a4 p4-3/a3 p4-2/a2 p4-1/a1 p4-0/a0 gnd p0-7/d7 p0-6/d6 p0-5/d5 p0-4/d4 p0-3/d3 p0-2/d2 p0-1/d1 p0-0/d0 p3-3/wr p3-2/rd p3-1/psen p11-7/tm9evt p11-6/tm9out p11-3/xtout p11-2/clkout p11-1/hold p11-0/wait v dd osc1 osc0 gnd xt1 xt0 v dd ea nmi res p5-7/tm0evt p5-6/tm0out p5-5/cpcm1 p5-4/cpcm0 a18/p2-2 a19/p2-3 v dd v ref ai0/p12-0 ai1/p12-1 ai2/p12-2 ai3/p12-3 ai4/p12-4 ai5/p12-5 ai6/p12-6 ai7/p12-7 agnd rxd0/p7-0 txd0/p7-1 gnd rxc0/p7-2 tm3out/p7-4 tm3evt/p7-5 siock3/p10-0 sioi3/p10-1 sioo3/p10-2 p10-3 85 90 95 100 1 5 10 15 20 25 p6-7 30 80 75 70 65 60 55 50 45 40 35 p1-7/a15 p2-0/a16 p2-1/a17 100-pin plastic qfp
pedl66573-02 1 semiconductor msm66573 family 7/28 pin descriptions in the type column, ?i? indicates an input pin, ?o? indicates an output pin, and ?i/o? indicates an i/o pin. function classification symbol type primary function type secondary function p0_0/d0 to p0_7/d7 i/o 8-bit i/o port 10 ma sink capability pull-up resistors can be specified for each individual bit i/o external memory access data i/o port p1_0/a8 to p1_7/a15 i/o 8-bit i/o port pull-up resistors can be specified for each individual bit o external memory access address output port p2_0/a16 to p2_3/a19 i/o 4-bit i/o port pull-up resistors can be specified for each individual bit o external memory access address output port p3_1/ psen o external program memory access read strobe output pin p3_2/ rd o external memory access read strobe output pin p3_3/ wr i/o 3-bit i/o port 10 ma sink capability pull-up resistors can be specified for each individual bit o external memory access write strobe output pin p4_0/a0 to p4_7/a7 i/o 8-bit i/o port pull-up resistors can be specified for each individual bit o external memory access address output port p5_4/cpcm0 i/o capture 0 input / compare 0 output pin p5_5/cpcm1 i/o capture 1 input / compare 1 output pin p5_6/tm0out o timer 0 timer output pin p5_7/tm0evt i/o 4-bit i/o port pull-up resistors can be specified for each individual bit i timer 0 external event input pin p6_0/exint0 i external interrupt 0 input pin p6_1/exint1 i external interrupt 1 input pin p6_2/exint2 i external interrupt 2 input pin p6_3/exint3 8-bit i/o port pull-up resistors can be specified for each individual bit i external interrupt 3 input pin port p6_4 to p6_7 i/o ? none
pedl66573-02 1 semiconductor msm66573 family 8/28 function classification symbol type primary function type secondary function p7_0/rxd0 i sio0 receive data input pin port p7_1/txd0 i/o 7-bit i/o port pull-up resistors can be specified for each individual bit o sio0 transmit data output pin p7_2/rxc0 i sio0 external clock input pin p7_4/tm3out o timer 3 timer output pin p7_5/tm3evt i timer 3 external event input pin p7_6/pwm0out o pwm0 output pin p7_7/pwm1out o pwm1 output pin p8_0/rxd1 i sio1 receive data input pin p8_1/txd1 o sio1 transmit data output pin p8_2/rxc1 i/o sio1 receive clock i/o pin p8_3/txc1 i/o sio1 transmit clock i/o pin p8_4/tm4out o timer 4 timer output pin p8_6/pwm2out o pwm2 output pin p8_7/pwm3out i/o 7-bit i/o port pull-up resistors can be specified for each individual bit o pwm3 output pin p9_0/exint4 i external interrupt 4 input pin p9_1/exint5 i external interrupt 5 input pin p9_2, p9_3 ? none p9_7/hldack i/o 5-bit i/o port pull-up resistors can be specified for each individual bit o hold mode output pin p10_0/siock3 i/o sio3 transmit-receive clock i/o pin p10_1/sioci3 i sio3 receive data input pin p10_2/sioo3 o sio3 transmit data output pin p10_3 to p10_5 ? none p10_7/tm5evt i/o 7-bit i/o port pull-up resistors can be specified for each individual bit i timer 5 external event input pin p11_0/wait i external data memory access wait input pin p11_1/hold i hold mode request input pin p11_2/clkout o main clock pulse output pin p11_3/xtout o sub clock pulse output pin p11_6/tm9out o timer 9 timer output pin p11_7/tm9evt i/o 6-bit i/o port 10 ma sink capability pull-up resistors can be specified for each individual bit i timer 9 external event input pin p12_0/ai0 to p12_7/ai7 i 8-bit input port i a/d converter analog input port
pedl66573-02 1 semiconductor msm66573 family 9/28 classification symbol type function v dd i power supply pin connect all v dd pins to the power supply. gnd i gnd pin connect all gnd pins to gnd. v ref i analog reference voltage pin power supply agnd i analog gnd pin xt0 i sub clock oscillation input pin connect to a crystal oscillator of f = 32.768 khz. xt1 o sub clock oscillation output pin connect to a crystal oscillator of f = 32.768 khz. the clock output is opposite in phase to xt0. osc0 i main clock oscillation input pin connect to a crystal or ceramic oscillator. or, input an external clock. oscillation osc1 o main clock oscillation output pin connect to a crystal or ceramic oscillator. the clock output is opposite in phase to osc0. leave this pin unconnected when an external clock is used. reset res i reset input pin nmi i non-maskable interrupt input pin other ea i external program memory access input pin if the ea pin is enabled (low level), the internal program memory is masked and the cpu executes the program code in external program memory through all address space.
pedl66573-02 1 semiconductor msm66573 family 10/28 absolute maximum ratings parameter symbol condition rated value unit digital power supply voltage v dd ?0.3 to +7.0 v input voltage v i ?0.3 to v dd +0.3 v output voltage v o ?0.3 to v dd +0.3 v analog reference voltage v ref ?0.3 to v dd +0.3 v analog input voltage v ai gnd=agnd=0v ta=25c ?0.3 to v ref v 100-pin tqfp 650 mw power dissipation p d ta=70c per package 100-pin qfp 750 mw storage temperature t stg ? ?50 to +150 c recommended operating conditions parameter symbol condition rated value unit msm66573 msm66q573 f osc 30 mhz 4.5 to 5.5 msm66573l msm66q573l f osc 14 mhz 2.4 to 3.6 f osc 24 mhz 4.5 to 5.5 dogital power supply voltage v dd msm66p573 f osc 12 mhz 2.7 to 3.6 v analog reference voltage v ref ?v dd ?0.3 to v dd v analog input voltage v ai ? agnd to v ref v memory hold voltage v ddh f osc =0hz 2.0 to 5.5 v msm66573 msm66q573 v dd =4.5 to 5.5 v 2 to 30 msm66573l msm66q573l v dd =2.4 to 3.6 v 2 to 14 v dd =4.5 to 5.5 v 2 to 24 operating frequency f osc msm66p573 v dd =2.7 to 3.6 v 2 to 12 mhz ambient temperature ta ? ?30 to +70 c mos load 20 ? p0, p3, p11 6 ? fan out n ttl load p1, p2, p4, p5, p6, p7, p8, p9, p10 1?
pedl66573-02 1 semiconductor msm66573 family 11/28 allowable output current values msm66573l/q573l (v dd =2.4 to 3.6 v, ta=?30 to +70 c ) msm66573/q573 (v dd =4.5 to 5.5 v, ta=?30 to +70 c ) msm66p573 (v dd =2.7 to 3.6v/4.5 to 5.5 v, ta=?30 to +70 c ) parameter pin symbol min. typ. max. unit ?h? output pin (1 pin) all output pins i oh ???2 ?h? output pins (sum total) sum total of all output pins i oh ? ? ?40 p0, p3, p11 10 ?l? output pin (1 pin) other ports i ol ?? 5 sum total of p0, p3, p11 80 sum total of p1, p2, p4 sum total of p5, p6, p9 sum total of p7, p8, p10 50 ?l? output pins (sum total) sum total of all output pins i ol ?? 140 ma [note] connect the power supply voltage to all v dd pins and the ground voltage to all gnd pins.
pedl66573-02 1 semiconductor msm66573 family 12/28 electrical characteristics dc characteristics 1 (v dd =4.5 to 5.5 v) msm66573/q573/p573 (v dd =4.5 to 5.5 v, ta= ? 30 to +70 c ) parameter symbol condition min. typ. max. unit ?h? input voltage *1 0.44 v dd ?v dd +0.3 ?h? input voltage *2, *3, *4, *5, *6, *7 v ih ? 0.80 v dd ?v dd +0.3 ?l? input voltage *1 ?0.3 ? 0.16 v dd ?l? input voltage *2, *3, *4, *5, *6, *7 v il ? ?0.3 ? 0.2 v dd i o =?400 av dd ?0.4 ? ? ?h? output voltage *1, *4 i o =?2.0 ma v dd ?0.6 ? ? i o =?200 av dd ?0.4 ? ? ?h? output voltage *2 v oh i o =?2.0 ma v dd ?0.6 ? ? i o =3.2 ma ? ? 0.4 ?l? output voltage *1, *4 i o =10.0 ma ? ? 0.8 i o =1.6 ma ? ? 0.4 ?l? output voltage *2 v ol i o =5.0 ma ? ? 0.8 v input leakage current*3, *6 ? ? 1/?1 input current *5 ? ? 1/?250 input current *7 i ih /i il v i =v dd /0 v ? ? 15/?15 a output leakage current *1, *2, *4 i lo v o =v dd /0 v ? ? 10 a pull-up resistance r pull v i = 0 v 25 50 100 k ? input capacitance c i ?5? output capacitance c o f=1 mhz, ta=25c ?7? pf during a/d operation ? ? 4 ma analog reference supply current i ref when a/d is stopped ? ? 10 a *1: applicable to p0 *5: applicable to res *2: applicable to p1, p2, p4, p5, p6, p7, p8, p9, p10 *6: applicable to ea , nmi *3: applicable to p12 *7: applicable to osc0 *4: applicable to p3, p11
pedl66573-02 1 semiconductor msm66573 family 13/28 supply current (v dd =4.5 to 5.5 v) msm66573 (v dd =4.5 to 5.5 v, ta=?30 to +70c) mode symbol condition min. typ. max. unit f=30 mhz, no load ?3655ma cpu operation mode i dd f=32.768 khz, no load ? 60 160 a halt mode i ddh f=30 mhz, no load ?2335ma xt is used* ? 5 110 osc is stopped xt is not used* ? 1 100 stop mode i dds osc is stopped, xt is not used v dd =2 v, ta=25c* ?0.210 a *: ports used as inputs are at v dd or 0 v. other ports are unloaded. msm66q573 (v dd =4.5 to 5.5 v, ta=?30 to +70c) mode symbol condition min. typ. max. unit f=30 mhz, no load ?4270ma cpu operation mode i dd f=32.768 khz, no load ? 60 160 a halt mode i ddh f=30 mhz, no load ? 24 40 ma xt is used* ? 5 110 osc is stopped xt is not used* ? 1 100 stop mode i dds osc is stopped, xt is not used v dd =2 v, ta=25c* ?0.210 a *: ports used as inputs are at v dd or 0 v. other ports are unloaded. msm66p573 (v dd =4.5 to 5.5 v, ta=?30 to +70c) mode symbol condition min. typ. max. unit f=24 mhz, no load ?6080ma cpu operation mode i dd f=32.768 khz, no load ? 114 300 a halt mode i ddh f=24 mhz, no load ? 30 40 ma xt is used* ? 6 120 osc is stopped xt is not used* ? 1 100 stop mode i dds osc is stopped, xt is not used v dd =2 v, ta=25c* ?0.210 a *: ports used as inputs are at v dd or 0 v. other ports are unloaded.
pedl66573-02 1 semiconductor msm66573 family 14/28 dc characteristics 2 (v dd =2.4 to 3.6 v) msm66573l/q573l (v dd =2.4 to 3.6 v, ta=?30 to +70c) msm66p573 (v dd =2.7 to 3.6 v, ta=?30 to +70c) parameter symbol condition min. typ. max. unit ?h? input voltage *1 0.44v dd ?v dd +0.3 ?h? input voltage *2, *3, *4, *5, *6, *7 v ih ? 0.80v dd ?v dd +0.3 ?l? input voltage *1 ?0.3 ? 0.16 v dd ?l? input voltage *2, *3, *4, *5, *6, *7 v il ? ?0.3 ? 0.2 v dd i o =?400 a v dd ?0.4 ? ? ?h? output voltage *1, *4 i o =?2.0 ma v dd ?0.8 ? ? i o =?200 a v dd ?0.4 ? ? ?h? output voltage *2 v oh i o =?1.0 ma v dd ?0.8 ? ? i o =3.2 ma ??0.5 ?l? output voltage *1, *4 i o =5.0 ma ??0.9 i o =1.6 ma ??0.5 ?l? output voltage *2 v ol i o =2.5 ma ??0.9 v input leakage current*3, *6 ? ? 1/?1 input current *5 ? ? 1/?250 input current *7 i ih /i il v i =v dd /0 v ? ? 15/?15 a output leakage current *1, *2, *4 i lo v o =v dd /0 v ? ? 10 a pull-up resistance r pull v i = 0 v 40 100 200 k ? input capacitance c i ?5? output capacitance c o f=1 mhz, ta=25c ?7? pf during a/d operation ?? 2ma analog reference supply current i ref when a/d is stopped ?? 5 a *1: applicable to p0 *5: applicable to res *2: applicable to p1, p2, p4, p5, p6, p7, p8, p9, p10 *6: applicable to ea , nmi *3: applicable to p12 *7: applicable to osc0 *4: applicable to p3, p11
pedl66573-02 1 semiconductor msm66573 family 15/28 supply current (v dd =2.4 to 3.6 v) msm66573l (v dd =2.4 to 3.6 v, ta=?30 to +70c) mode symbol condition min. typ. max. unit f=14 mhz, no load ?1220ma cpu operation mode i dd f=32.768 khz, no load ? 30 130 a halt mode i ddh f=14 mhz, no load ? 7 11 ma xt is used* ? 2 110 osc is stopped xt is not used* ? 1 100 stop mode i dds osc is stopped, xt is not used v dd =2 v, ta=25c* ?0.210 a *: ports used as inputs are at v dd or 0 v. other ports are unloaded. msm66q573l (v dd =2.4 to 3.6 v, ta=?30 to +70c) mode symbol condition min. typ. max. unit f=14 mhz, no load ?1322ma cpu operation mode i dd f=32.768 khz, no load ? 30 130 a halt mode i ddh f=14 mhz, no load ? 7 11 ma xt is used* ? 3 110 osc is stopped xt is not used* ? 1 100 stop mode i dds osc is stopped, xt is not used v dd =2 v, ta=25c* ?0.210 a *: ports used as inputs are at v dd or 0 v. other ports are unloaded. msm66p573 (v dd =2.7 to 3.6 v, ta=?30 to +70c) mode symbol condition min. typ. max. unit f=12 mhz, no load ?1724ma cpu operation mode i dd f=32.768 khz, no load ? 65 160 a halt mode i ddh f=12 mhz, no load ? 8 12 ma xt is used* ? 3 110 osc is stopped xt is not used* ? 1 100 stop mode i dds osc is stopped, xt is not used v dd =2 v, ta=25c* ?0.210 a *: ports used as inputs are at v dd or 0 v. other ports are unloaded.
pedl66573-02 1 semiconductor msm66573 family 16/28 ac characteristics 1 (vdd = 4.5 to 5.5 v) (1) external program memory control msm66573/q573/p573 (v dd =4.5 to 5.5 v, ta=?30 to +70c) parameter symbol condition min. max. unit cycle time t cyc f osc =30 mhz 33.3 ? clock pulse width (high level) t wh 13 ? clock pulse width (low level) t wl 13 ? psen pulse width t pw 2t ?15 ? psen pulse delay time t pd ?45 address setup time t as t ?25 ? address hold time t ah 0? instruction setup time t is 25 *1 ? instruction hold time t ih 0? read data access time t acc c l =50 pf ? 3t ?65 *2 ns note: t=t c y c /2 *1: msm66p573=30 *2: msm66p573=3t?70 t wh t wl t cyc pc0 to 19 t pw t pd inst0 to 7 t as t ah t acc t is t ih bus timing during no wait cycle time cpuclk psen a0 to a19 d0 to d7
pedl66573-02 1 semiconductor msm66573 family 17/28 (2) external data memory control msm66573/q573/p573 (v dd =4.5 to 5.5 v, ta=?30 to +70c) parameter symbol condition min. max. unit cycle time t cyc f osc =30 mhz 33.3 ? clock pulse width (high level) t wh 13 ? clock pulse width (low level) t wl 13 ? rd pulse width t rw 2t ?15 ? wr pulse width t ww 2t ?15 ? rd pulse delay time t rd ?45 wr pulse delay time t wd ?45 address setup time t as t ?25 ? address hold time t ah t ?3 ? read data setup time t rs 25 *1 ? read data hold time t rh 0? read data access time t acc ? 3t ?65 *2 write data setup time t ws 2t ?30 ? write data hold time t wh c l =50 pf t ?3 ? ns note: t=t cyc /2 *1: msm66p573=30 *2: msm66p573=3t?70 t rh t ah t wh t wl t cyc rap0 to 19 t rw t rd din0 to 7 t as t acc t rs cpuclk rd a0 to a19 d0 to d7 bus timing during no wait cycle time t wh t ah rap0 to 19 t ww t wd dout0 to 7 t as t ws wr a0 to a19 d0 to d7
pedl66573-02 1 semiconductor msm66573 family 18/28 (3) serial port control master mode msm66573/q573/p573 (v dd =4.5 to 5.5 v, ta=?30 to +70 c ) parameter symbol condition min. max. unit cycle time t cyc f osc =30 mhz 33.3 ? serial clock cycle time t sckc 4t cyc ? output data setup time t stmxs 2t ?5 ? output data hold time t stmxh 5t ?10 ? input data setup time t srmxs 13 ? input data hold time t srmxh c l =50 pf 0? ns note: t =t cyc /2 t cyc cpuclk txc/ rxc sdout (txd) sdin (rxd) t stmxs t stmxh t sckc t srmxs t srmxh
pedl66573-02 1 semiconductor msm66573 family 19/28 slave mode msm66573/q573/p573 (v dd =4.5 to 5.5 v, ta=?30 to +70c) parameter symbol condition min. max. unit cycle time t cyc f osc =30 mhz 33.3 ? serial clock cycle time t sckc 4t cyc ? output data setup time t stmxs 2t ?15 ? output data hold time t stmxh 4t ?10 ? input data setup time t srmxs 13 ? input data hold time t srmxh c l =50 pf 3? ns note: t =t cyc /2 txc/ rxc sdout (txd) sdin (rxd) t stmxs t stmxh t sckc t srmxs t srmxh t cyc cpuclk measurement points for ac timing (except the serial port) v dd 0 v 2.0 v 0.8 v 2.0 v 0.8 v measurement points for ac timing (the serial port) v dd 0v 0.8v dd 0.2v dd 0.8v dd 0.2v dd
pedl66573-02 1 semiconductor msm66573 family 20/28 ac characteristics 2 (vdd = 2.4 to 3.6 v) (1) external program memory control msm66573l/q573l (vdd=2.4 to 3.6 v, ta=?30 to +70c) msm66p573 (vdd=2.7 to 3.6 v, ta=?30 to +70c) parameter symbol condition min. max. unit cycle time t cyc f osc =14 mhz 71.4 ? clock pulse width (high level) t wh 28 ? clock pulse width (low level) t wl 28 ? psen pulse width t pw 2t ?25 *1 ? psen pulse delay time t pd ?75 address setup time t as t ?40 ? address hold time t ah -8 *2 ? instruction setup time t is 60 ? instruction hold time t ih -8 *2 ? read data access time t acc c l =50 pf ? 3t ?120 ns note: t=t cyc /2 *1: msm66p573=2t?20 *2: msm66p573=0 t wh t wl t cyc pc0 to 19 t pw t pd inst0 to 7 t as t ah t acc t is t ih bus timing during no wait cycle time cpuclk psen a0 to a19 d0 to d7
pedl66573-02 1 semiconductor msm66573 family 21/28 (2) external data memory control msm66573l/q573l (vdd=2.4 to 3.6 v, ta=?30 to +70c) msm66p573 (vdd=2.7 to 3.6 v, ta=?30 to +70c) parameter symbol condition min. max. unit cycle time t cyc f osc =14 mhz 71.4 ? clock pulse width (high level) t wh 28 ? clock pulse width (low level) t wl 28 ? rd pulse width t rw 2t ?25 *1 ? wr pulse width t ww 2t ?25 *1 ? rd pulse delay time t rd ?75 wr pulse delay time t wd ?75 address setup time t as t ?40 ? address hold time t ah t ?8 *2 ? read data setup time t rs 60 ? read data hold time t rh 0? read data access time t acc ? 3t ?120 write data setup time t ws 2t ?40 ? write data hold time t wh c l =50 pf t ?6 ? ns note: t=t cyc /2 *1: msm66p573=2t?20 *2: msm66p573=t?6 t rh t ah t wh t wl t cyc rap0 to 19 t rw t rd din0 to 7 t as t acc t rs cpuclk rd a0 to a19 d0 to d7 bus timing during no wait cycle time t wh t ah rap0 to 19 t ww t wd dout0 to 7 t as t ws wr a0 to a19 d0 to d7
pedl66573-02 1 semiconductor msm66573 family 22/28 (3) serial port control master mode msm66573l/q573l (v dd =2.4 to 3.6 v, ta=?30 to +70c) msm66p573 (v dd =2.7 to 3.6 v, ta=?30 to +70c) parameter symbol condition min. max. unit cycle time t cyc f osc =14 mhz 71.4 ? serial clock cycle time t sckc 4tcyc ? output data setup time t stmxs 2t ?10 ? output data hold time t stmxh 5t ?20 ? input data setup time t srmxs 21 ? input data hold time t srmxh c l =50 pf 0? ns note: t=t cyc /2 t cyc cpuclk txc/ rxc sdout (txd) sdin (rxd) t stmxs t stmxh t sckc t srmxs t srmxh
pedl66573-02 1 semiconductor msm66573 family 23/28 slave mode msm66573l/q573l (v dd =2.4 to 3.6 v, ta=?30 to +70c) msm66p573 (v dd =2.7 to 3.6 v, ta=?30 to +70c) parameter symbol condition min. max. unit cycle time t cyc f osc =14 mhz 71.4 ? serial clock cycle time t sckc 4t cyc ? output data setup time t stmxs 2t ?30 ? output data hold time t stmxh 4t ?20 ? input data setup time t srmxs 21 ? input data hold time t srmxh c l =50 pf 7? ns note: t=t cyc /2 txc/ rxc sdout (txd) sdin (rxd) t stmxs t stmxh t sckc t srmxs t srmxh t cyc cpuclk measurement points for ac timing of msm66573l/q573l v dd 0v 0.44v dd 0.16v dd 0.44v dd 0.16v dd measurement points for ac timing of msm66p573 (except the serial port) v dd 0 v 2.0 v 0.8 v 2.0 v 0.8 v measurement points for ac timing (the serial port) v dd 0v 0.8v dd 0.2v dd 0.8v dd 0.2v dd
pedl66573-02 1 semiconductor msm66573 family 24/28 a/d converter characteristics 1 (v dd =4.5 to 5.5 v) msm6573/q573/p573 (ta=?30 to +70c, v dd =v ref =4.5 to 5.5 v, agnd=gnd=0 v) parameter symbol condition min. typ. max. unit resolution n?10?bit linearity error e l ??3 differential linearity error e d ??2 zero scale error e zs ??+3 full-scale error e fs refer to measurement circuit 1 analog input source impedance r i 5 k ? t conv =10.7 s ???3 cross talk e ct refer to measurement circuit 2 ??1 lsb conversion time t conv set according to adtm set data 10.7 ? ? s/ch a/d converter characteristics 2 (v dd =2.4 to 3.6 v) msm66573l/q573l (ta=?30 to +70 c , v dd =v ref =2.4 to 3.6 v, agnd=gnd=0 v) msm66p573 (ta=?30 to +70 c , v dd =v ref =2.7 to 3.6 v, agnd=gnd=0 v) parameter symbol condition min. typ. max. unit resolution n?10?bit linearity error e l ??4 differential linearity error e d ??3 zero scale error e zs ??+4 full-scale error e fs refer to measurement circuit 1 analog input source impedance r i 5 k ? t conv =27.4 s ???4 cross talk e ct refer to measurement circuit 2 ??2 lsb conversion time t conv set according to adtm set data 27.4 ? ? s/ch v ref reference voltage v dd gnd ? + analog input r i ai0 to ai7 c i 0.1 f 47 f + 0.1 f 47 f + +5 v 0 v agnd r i (impedance of analog input source) 5 k ? c i ? 0.1 f measurement circuit 1
pedl66573-02 1 semiconductor msm66573 family 25/28 ? + analog input 5 k ? 0.1 f ai0 ai1 ai7 cross talk is the difference between the a/d conversion results when the same analog input is applied to ai0 through ai7 and the a/d conversion results of the circuit to the left. to v ref or agnd measurement circuit 2 definition of terminology 1. resolution resolution is the value of minimum discernible analog input. with 10 bits, since 2 10 = 1024, resolution of (v ref ? agnd) 1024 is possible. 2. linearity error linearity error is the difference between ideal conversion characteristics and actual conversion c haracteristics of a 10-bit a/d converter (not including quantization error). ideal conversion characteristics can be obtained by dividing the voltage between v ref and agnd into 1024 equal steps. 3. differential linearity error differential linearity error indicates the smoothness of conversion characteristics. ideally, the range of analog input voltage that corresponds to 1 converted bit of digital output is 1lsb = (v ref ? agnd) 1024. differential error is the difference between this ideal bit size and bit size of an arbitrary point in the conversion range. 4. zero scale error zero scale error is the difference between ideal conversion characteristics and actual conversion characteristics at the point where the digital output changes from 000h to 001h. 5. full-scale error full-scale error is the difference between ideal conversion characteristics and actual conversion characteristics at the point where the digital output changes from 3feh to 3ffh.
pedl66573-02 1 semiconductor msm66573 family 26/28 package dimensions (unit: mm) tqfp100-p-1414-0.50-k package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m or more 0.55 typ. mirror finish notes for mounting the surface mount type package the sop, qfp, tsop, tqfp, lqfp, soj, qfj (plcc), shp, and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact oki?s responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
pedl66573-02 1 semiconductor msm66573 family 27/28 (unit: mm) qfp100-p-1420-0.65-bk package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m or more 1.29 typ. mirror finish notes for mounting the surface mount type package the sop, qfp, tsop, tqfp, lqfp, soj, qfj (plcc), shp, and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact oki?s responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
pedl66573-02 1 semiconductor msm66573 family 28/28 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third party?s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third party?s right which may result from the use thereof. 6. the products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. copyright 1999 oki electric industry co., ltd.

▲Up To Search▲

Price & Availability of MSM66573L-TB

	To Download MSM66573L-TB Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .